SI Analysis services
Basics
of Electromagnetic analysis (as applicable to signal integrity)
Pre-route
and post-route Signal Integrity Analysis
SI
compliance verification for an existing design
Reflection
& Ringing Waveform Analysis
Crosstalk
analysis (Single ended & Differential) & mitigation
SerDes
analysis and evaluation
Channel
& Eye-diagram Analysis
Library
services IBIS Model creation & Validation
Effect
of losses (Skin effect, surface roughness & dielectric)
Differential
pair designs (Trace width, spacing, distance to return plane & routing
rules)
Stackup
design and analysis including laminate selection
Via
Optimization & design for controlled impedance
Impedance
matching Analysis
Definition
of Topology and terminations
Floor
planning & constraint driven routing
Creation
of topology templates and routing rules
Transmission
lines & their effects
Reflections
& impedance mismatch analysis
impedance
concept (Z0 : single-ended & differential)
Crosstalk
(near-end/far-end)
Switching
noise (SSN)
s-parameter
& TDR
stackup
design, via design & quality routing concepts.
Signal
integrity topology analysis & termination effect
Power
Integrity basics
Target
impedance design
decoupling
cap selection and analysis
Hands-on
simulation experience on DDR3 & PCIe
High
speed serial/parallel interface analysis and design guidelines (DDR3, DDR4,
multi-gigabit Serdes, PCIe gen3 & gen4, XAUI, HDMI, SATA, USB, chip-to-chip
IO, FPGA IO)
Signal
integrity & power integrity co-design SSN modeling
pre-layout
& post-layout SI/PI analysis.
IBIS/IBIS-AMI
based system level SI evaluation.
Routing
studies, termination schemes, stackup design & analysis.
Trace
(microstrip, stripline, CPW) & Via design for controlled impedance using EM
solver.
Full-wave
EM modeling of all kinds of interconnects (via, connector, end-to-end channel)
Crosstalk
and s-parameter modeling of traces and interconnects on package and board
EMI/EMC
EMI Sources, Victims and Crosstalk
Coupling
Radiation emissions
Conducted emissions
Methodology and Techniques
of EMC analysis
EMI/EMC analysis- Area of
interest
Clock
Power Section
High Speed Signals
PCB Basics for EMC compliances
EMC Analysis Vs EMC Test
EMC standards
EMC Analysis
PCB EM Field:
Significance of Resonance analysis over RE test.
Debugging issue and solution techniques.
Power Section
EMC issue in Power section.
Decoupling Analysis (Power Plane Impedance Analysis)
DC Drop/ Return Path Analysis
Ground Plane and via shielding effects
Clock and Signals
EMC Issues in Clock and signals- Crosstalk, SSN
Tips and techniques for EMC
analysis on various Tools.
Radiated
Emissions (RE) simulation and analysis
Near
Filed (magnetic) Emission simulation and analysis
Far
Filed (electrical) Emission simulation and analysis
Multiple
Board EMI analysis for electronic systems and sub-systems
Full
Board level radiated emissions analysis
Net
level radiated emissions for quick turn analysis
EMC
emission testing (RE, CE)
EMC
Immunity Testing
Experienced in Board level &
System level EMI Analysis.
Frequency V/S dB plot for Different
standards (FCC, CISPR, VCCI or User specific)
RE/CE analysis to find out how much
the product is emitting.
RI/CI analysis to find out how much
the product can withstand external radiation.
3D Magnetic/Electric & Current
density Plot
Power Integrity Analysis
DC Drop Analysis
DC Noise Analysis
Decoupling Analysis
Thermal Analysis
Identifying points of
weakness in thermal/mechanical design (hot spots)
Looking for zones of
stagnation (low cooling efficiency)
Identifying overstressed
components (junction temperature exceeding established value)
Thermal analysis serves as
an input to mechanical and electrical design improvements,
reliability prediction and
stress analysis.
Detailed reports indicating component and board temperature
profiles
Heat sink and cooling proposals
Metal core and thermal ladder PCB designs
Mean time between failure study
Major heat transfer mechanisms analysis viz., Conduction,
Convection, Radiation
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